The present invention concerns a process for fabricating a high-speed CMOS TTL (hereinafter refered to as "HCT") semiconductor device and in particular a process for adjusting the operational speed of the semiconductor device by capacitance in the field region thereof.
Generally, the operational speed of a semiconductor device used in a logic circuit is controlled by two factors, that are, circuit design and fabrication process therein. The control of operational speed by the fabrication process can be achieved by adjusting the parasitic capacitance resulting from the thickness of its field oxide layer. Because it becomes possible to change by adjustment of the parasitic capacitance the time constant .tau. of the time function which is determined by the resistance component and the parasitic capacitance, the operational speed of a semiconductor device can be to some extent controlled by adjusting the thickness of the field oxide layer in the fabrication process.
FIG. 1 illustrates a conventional CMOS inverter comprising PMOS field effect transistor (PMOS) and NMOS field effect transistor (NMOS) wherein the input data Vi are inverted to the output data Vo. Referring to FIG. 2, which is a cross-sectional view of field region a between NMOS and PMOS shaded by slant lines in FIG. 1, region 1 represents N-type semiconductor substrate, region 2 a P-type well region to form NMOS, region 3 an ohmic contact of the P-well, region 4 a N+ region of NMOS drain, region 5 a N+ stop-channel, region 6 P+ region of PMOS drain, region 7 a field oxide layer, and region 8 a metal line for connecting the drains of PMOS and NMOS, respectively. In such a CMOS construction, because the lower region of the field oxide layer 7 is formed with a high concentration P+ region and a low concentration N- region, it is difficult to adjust the capacitance of the field region. Hence, the prior art process generally requires two processing sequences, one of which is, so called, an AHCT process increasing the thickness of the field oxide layer, and the other is a HCTLS process decreasing the thickness of the field oxide layer. Consequently, it makes the fabrication complicated.